AOSP32320C general description product summary v ds i d (at v gs =10v) 8.5a r ds(on) (at v gs =10v) < 22m r ds(on) (at v gs =4.5v) < 30m applications 100% uis tested 100% rg tested symbol v ds v gs i dm i as avalanche energy l=0.1mh c e as t j , t stg symbol t 10s steady-state steady-state r q jl 30v n-channel mosfet orderable part number package type form minimum order quantity 30v ? trench power mosfet technology ? low r ds(on) ? low gate charge ? high current capability ? rohs and halogen-free compliant t a =25c avalanche current c thermal characteristics w i d a 11 36 mj 6 8.5 parameter max c units junction and storage temperature range -55 to 150 typ maximum junction-to-ambient a c/w r q ja 42 70 50 AOSP32320C so-8 tape & reel 3000 v a absolute maximum ratings t a =25c unless otherwise noted 20 v maximum units t a =25c t a =70c maximum junction-to-lead c/w c/w maximum junction-to-ambient a d 20 85 30 ? dc/dc converters in computing ? suitable for general purpose power dissipation b 1.6 t a =70c p d 30 2.5 gate-source voltage pulsed drain current c 6.5 parameter drain-source voltage continuous drain current soic-8 top view bottom view d d d d s s s g g d s rev.1.0: march 2019 www.aosmd.com page 1 of 5 downloaded from: http:///
AOSP32320C symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.3 1.8 2.3 v 18 22 t j =125c 26 32 23 30 m g fs 20 s v sd 0.7 1 v i s 3 a c iss 650 pf c oss 70 pf c rss 50 pf r g 1 2.1 3 q g (10v) 12.5 20 nc q g (4.5v) 7 14 nc q gs 2 nc q gd 2.5 nc t d(on) 5 ns t r 3 ns t d(off) 18 ns t f 2.5 ns t rr 5 ns q rr 5 nc applications or use as critical components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applicatio ns or uses of its products. aos reserves the right to improve product design,functions and reliability without no tice. m v gs =10v, v ds =15v, i d =8.5a total gate charge electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions gate resistance f=1mhz i dss a zero gate voltage drain current drain-source breakdown voltage id=250a, vgs=0v r ds(on) static drain-source on-resistance gate source charge gate drain charge total gate charge switching parameters turn-on delaytime v ds =0v, v gs =20v maximum body-diode continuous current input capacitance gate-body leakage current body diode reverse recovery charge body diode reverse recovery time i f =8.5a, di/dt=500a/ m s turn-off delaytime turn-off fall time v gs =10v, v ds =15v, r l =1.765 w , r gen =3 w diode forward voltage dynamic parameters v gs =4.5v, i d =7.3a i f =8.5a, di/dt=500a/ m s turn-on rise time reverse transfer capacitance v gs =0v, v ds =15v, f=1mhz v ds =v gs, i d =250 m a output capacitance forward transconductance i s =1a, v gs =0v v ds =5v, i d =8.5a v gs =10v, i d =8.5a a. the value of r q ja is measured with the device mounted on 1in 2 fr -4 board with 2oz. copper, in a still air environment with t a =25 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using 10s junction- to -ambient thermal resistance. c. repetitive rating, pulse width limited by junction temperature t j(max) =150 c. ratings are based on low frequency and duty cycles to keep initialt j =25 c. d. the r q ja is the sum of the thermal impedance from junction to lead r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction- to -ambient thermal impedance which is measured with the device mounted on 1in 2 fr -4 board with 2oz. copper, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. rev.1.0: march 2019 www.aosmd.com page 2 of 5 downloaded from: http:///
AOSP32320C typical electrical and thermal characteristics 0 10 20 30 40 50 0 1 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 10 20 30 40 0 5 10 15 20 25 r ds(on) (m w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 1.0e- 05 1.0e- 04 1.0e- 03 1.0e- 02 1.0e- 01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 normalized on-resistance temperature ( c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =7.3a v gs =10v i d =8.5a 0 10 20 30 40 50 60 70 2 4 6 8 10 r ds(on) (m w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) 25 c 125 c v ds =5v v gs =4.5v v gs =10v i d =8.5a 25 c 125 c 0 10 20 30 40 50 0 1 2 3 4 5 i d (a) v ds (volts) figure 1: on-region characteristics (note e) v gs =3v 3.5v 4.5v 10v 4v rev.1.0: march 2019 www.aosmd.com page 3 of 5 downloaded from: http:///
AOSP32320C typical electrical and thermal characteristics 1 10 100 1000 1e - 05 0.001 0.1 10 power (w) pulse width (s) figure 10: single pulse power rating junction- to - ambient (note f) 0 2 4 6 8 10 0 3 6 9 12 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 100 200 300 400 500 600 700 800 900 1000 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0.001 0.01 0.1 1 10 1e - 05 0.0001 0.001 0.01 0.1 1 10 100 z q ja normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal impedance (note f) c oss c rss v ds =15v i d =8.5a single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p dm in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150 c t a =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) v gs > or equal to 4.5v figure 9: maximum forward biased safe operating area (note f) 10 m s 1ms dc r ds(on) limited t j(max) =150 c t a =25 c 100 m s 10ms r q ja =85 c/w rev.1.0: march 2019 www.aosmd.com page 4 of 5 downloaded from: http:///
AOSP32320C - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr figure a: gate charge test circuit & waveforms figure b: resistive switching test circuit & waveforms figure c: unclamped inductive switching (uis) test circuit & waveforms figure d: diode recovery test circuit & waveforms rev.1.0: march 2019 www.aosmd.com page 5 of 5 downloaded from: http:///
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